The present invention relates to a method for forming an insulation film on the surface of silicon buried in a trench formed in a substrate. More particularly, the present invention relates to a method for forming an insulation film having a high quality on the surface of a semiconductor constituting a trench type capacitor. More particularly, the present invention relates to a method for forming an insulating film on the surface of a semiconductor constituting a capacitor of DRAM (dynamic random access memory) and a process for fabricating DRAM using a trench type capacitor.
The steps of typical instance of the conventional method for forming an insulation film on a trench type capacitor are shown in sectional views of FIGS. 2a through 2d. On a silicon substrate 11 having a field oxide film 14 as shown in FIG. 2a, a silicon nitride (Si.sub.3 N.sub.4) film 21 is formed as shown in FIG. 2b, and the silicon nitride film 21 is shaped into a form corresponding to a desired trench form and the silicon substrate 11 is etched by using this shaped silicon film as a mask 22 to form a trench. Polycrystalline silicon 16 is buried in the trench to obtain a state as shown in FIG. 2c. Reference numeral 15 represents a silicon oxide (SiO.sub.2) film. According to the conventional technique, for example, as shown in FIG. 2d, polycrystalline silicon buried in the trench is oxidized by using the Si.sub.3 N.sub.4 film, which has covered the surface other than the trench at the step of forming a trench, as the mask 22 to form SiO.sub.2 17 on the surface of the polycrystalline silicon in the trench. In this case, since Si.sub.3 N.sub.4 is present around the trench, the thickness of the SiO.sub.2 film on the surface of the peripheral portion of the trench is much smaller than the thickness of the SiO.sub.2 film on the surface of the central portion of the trench, and therefore, the dielectric strength of the peripheral portion is drastically reduced. More specifically, if the thickness of the SiO.sub.2 film on the surface of the central portion of the trench is 300 nm, the thickness of the SiO.sub.2 film on the surface of the peripheral portion of the trench is, for example, less than 10 nm. The reason is that the end portion of the surface of the polycrystalline silicon 16 falling in contact with Si.sub.3 N.sub.4 is hardly oxidized.
Incidentally, the reason why an insulation film formed on the surface of a semiconductor constituting a trench type capacitor should have a good quality and a high dielectric strength is that, for example, DRAM generally has a structure in which a gate electrode of a transistor is placed on a trench and it is important to maintain a high dielectric strength between the gate electrode and the polycrystalline silicon 16 in the trench. FIG. 2e is a sectional view illustrating the state where a gate electrode 23 composed of polycrystalline silicon is formed on the insulation film on the trench type capacitor.
As a typical instance of the conventional technique of forming an insulation film on a trench type capacitor, there can be mentioned the method disclosed in Japanese Patent Application Laid-Open Specification No. 115336/1986. According to this conventional method, an insulation film on silicon buried in a trench is formed by the above-mentioned step shown in FIG. 2d.
Incidentally, some of the present inventors filed a patent application for DRAM comprising a trench type capacitor in the United States and Korea after the Convention priority date of the instant patent application. Namely, U.S. Pat. application Ser. No. 123,235 and Korean Pat. application No. 87-13276 were filed on Nov. 20, 1987 and Nov. 25, 1987, respectively. Each of these U.S. and Korean patent applications is only a prior application and cannot be a prior art to the present invention.